The 386 microcode sequencer has a one-cycle pipeline delay: when a jump or RNI (run next instruction) is decoded, the micro-instruction immediately after it has already been fetched and will execute before the jump takes effect. This "delay slot" is a basic property of the sequencer, and the microcode is written to fill it with useful work rather than waste a cycle on a bubble. The examples in the PTSAV section above show this: at 582/5AE, the micro-instruction after LCALL executes before the subroutine begins.
Dr Greg Leo, an economist at Vanderbilt University in Nashville, Tennessee, has come up with a compatibility algorithm. It finds that not only might you have a "One" you have lots of "Ones".
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We have picked out six that have never been on display. You can see where they were found on the HS2 route map below - then scroll further down to see the objects and read about their history.
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